20-ns Short-circuit detection scheme with high variation-tolerance based on analog delay multiplier circuit for advanced IGBTs

Advanced IGBTs need to be shut off when a short circuit occurs within less than 0.5μs as the current density of IGBTs increases. In this paper, a circuit design and the measurement results are described for an IC chip which enables the short-circuit detection within 20-ns. The circuit detects the short-circuit condition by checking the existence of a plateau in a gate drive waveform. The proposed scheme can provide much higher variation-tolerance compared with the conventional scheme by introducing adaptive threshold-time determination. This adaptive feature is realized for the first time using a novel analog delay multiplier circuit. The chip was fabricated in 0.18-μm TSMC high-voltage CMOS technology. The measurements are carried out and the short-circuit detection operation is successfully verified even though the gate driving waveform slope is varied 10 times. The slope variation is cased possibly due to the variation of the gate drive current and/or the gate capacitance (CGE+CGC). Added to the benefits described above, it does not need any special off-chip component such as an IGBT with a Kelvin emitter, a parasitic inductor, and an inherently slow current monitor. Thus, it can be applicable to a wide range of power circuits with advanced IGBTs.