Measurement of dynamic power dissipation and estimation of effective dynamic efficiencies in an LTE chireix PA

A testbed is reported for the measurement of the instantaneous power dissipation of a dual input Chireix power amplifier (PA) driven by an LTE signal. An FPGA system is used to dynamically control the phase difference and respective incident power level of the two signals injected at the dual-inputs of the Chireix PA under test. The dynamic drain currents of the power amplifier are measured using two Hall effect current probes placed inside and outside the PA biasing network. The synchronized acquisition of the biasing current, biasing voltage, and RF output power of the PA is then performed for 1 MHz and 10 MHz bandwidth LTE signals. As expected, the power spectra of the biasing currents exhibit twice the bandwidth of the LTE signals. After some signal processing and calibration, an estimation of the dynamic efficiency is obtained from the measured dynamic biasing current and RF output power. It is further verified that the insights obtained from the modeling of the dynamic power dissipation and its memory effects can assist with the optimization of the Chireix phase control required to maximize the average power efficiency of the Chireix PA.