A new high speed three stage class B output buffer for LCD applications

In this paper we have proposed a novel buffer amplifier to be used in LCD circuitry. The circuit is implemented on 0.18μm CMOS technology. The new high speed buffer shows the reduction in the value of settling time and also the power dissipation. The settling time of the output buffer for 1000 pF load is 0.94μs. The power consumption for this circuit is 50.89 μWatts. The gain of the new high speed three stage class B output buffer is improved and is 72dB and phase margin is equal to 54.166 degrees. The results obtained are well comparable with the available results.