On features of discrete signal reconstruction registered at the 8 parallel 5-bit ADC system output

The paper presents the results of the accuracy research of a discrete signal reconstruction registered at the 8 parallel 5-bit ADC system output based on the 65 nm CMOS technology. The discrete signal is referred to a class of signals with samples measured at the random non-uniform sampling location (jitter), and exact values of the samples at non-uniform sampling location being unknown. To reconstruct an accuracy of the reconstructed input signal, the ratio of the signal power to the error reconstruction power (Signal-to-Error Ration, SER) has been used. It is shown that the periodic signal reconstruction accuracy at small jitter values is defined by the amplitude signal quantization noise and differential nonlinearity of the high rate ADC considered at large values by the jitter value.