Compact Modeling of Transition Metal Dichalcogenide based Thin body Transistors and Circuit Validation

In this paper, we present a compact model for surface potential and drain current in transition metal dichalcogenide (TMD) channel material-based n-type and p-type FETs. The model considers 2-D density of states and Fermi-Dirac statistics along with drift-diffusion transport model and includes velocity saturation and trap state effects. The developed model has been implemented in Verilog-A and is applicable for symmetric double gate as well as top-gated TMD-on-insulator FETs. The presented model is extensively validated with simulation as well as experimental data for different TMD materials-based FETs and shows excellent agreement with both the simulation and the experimental data. We further validate the model at circuit level using experimental data of MoS
₂
FET-based inverter.