Design approach towards an efficient secure reconfigurable system

Ensuring security without compromising the efficiency and flexibility of a system is fundamentally a very challenging task for Researchers and Practitioners. One of the fundamental requirements is to execute security algorithms in isolation but with rest of the applications running in any high assurance system. Typically, this requirement is realized by physical separation achieved using a separate security co-processor or FPGAs with dedicated memory, however this increases the overall cost, hardware complexity, size and power requirements in an embedded system. This paper demonstrates realization of security primitive (isolation and controlled sharing) on a reconfigurable platform (read FPGA) for a practical real world crypto system. It is observed that innovative use of this mechanism can enable the crypto designers to create an efficient, secure crypto system, with minimal increase in design effort, resource consumption and performance of the system but significant reduction in device count in a system, board complexity, size and power, without compromising the overall security of the system.