A novel analog-digital flash converter architecture based on capacitive threshold gates

In this paper, the circuit architecture and operation of a novel analog-digital flash converter is presented, which is based on cascade-connected capacitive threshold gates. The circuit structure, which is realized using conventional CMOS technology, offers a very small overall layout area, simple operational requirements, and very high input-to-output response speed. Fabricated four-bit flash ADC circuits have been tested to exhibit highly accurate DC transfer characteristics, and typical transient response times in the order of 40 ns. Four-bit and five-bit flash ADC variants can be used as building blocks in high-speed pipelined ADC architectures with higher accuracy.