Parallel implementation of Kvazaar HEVC on multicore ARM processor

The emergence of the new standard HEVC (High Efficiency Video Coding) is accompanied with serious problems related to resource consumption and encoding time. The proposal of new tools and optimizations is strongly recommended to ensure the integration of this new encoder in various platforms and multimedia applications. In this context, Kvazaar HEVC encoder is introduced to overcome the problems related to HEVC test model (HM) reference software. This academic open-source is tailored to fit the programmer's needs by enabling highlevel parallel processing. In this context, this paper presents different parallel implementations of the Kvazaar HEVC encoder on a powerful Octa-core CubieBoard4 platform including two quad-core ARM A7 and ARM A15 for efficient power and high performance in a single chip. A performance comparison of different parallelization strategies is performed. For single-threaded implementation, experimental results show that the high speed preset (RD1) can save up to 48% and 91% of encoding time for Random Access (RA) and All-Intra (AI) configurations respectively. When moving to multi-threaded implementation, time saving is about 65% to 75% for AI configuration. Moreover, experiments show that Wavefront Parallel Processing (WPP) outperforms tiles-level parallelization in terms of encoding speed without inducing video quality degradation or bitrate increase.