Optimum zigzag scan mapping method on FPGA device

Growing telecommunications facilities currently used to transmit multimedia data. One example is the multimedia data transmission of image data, generally an image containing a large amount of data that requires a line of communication and storage media with large memory size. Therefore, efforts to reduce the size of image data (compressing image data) is needed. One of the stages in image compressing is zigzag scan image which serves to classify the components of the quantized coefficients ranging from low frequency to the high frequency. This article proposes the optimization zigzag scan using mapping method. The purpose of optimalization zigzag scan is for implementation into an FPGA and than can speed up the time of JPEG image compression process, finally a JPEG file size smaller is obtained. Mapping is made by placing the input data in accordance with the order of the zigzag position. The overall mapping process is implemented into the FPGA. Based on the simulation results, the input data can be placed in the order position has been determined for the same number of clock cycles with the number of input data (for 8∗8 image size is 64 clock cycles).