One electron-controlled multi-valued dynamic random-access-memory

A new architecture for a multi-valued dynamic random-access-memory (DRAM) using single-electron transistor (SET) is proposed. In this SET-DRAM hybrid scheme, the multiple switching characteristics of SET enables multiple value data stored in a DRAM unit cell, and this increases the storage functionality of the device. Moreover, since refreshing data requires only a small amount of SET driving current, this enables device operating with low standby power consumption.