Silicon contact technology for flip chip

In order to accommodate the flurry of new packaging technology, such as flip chip and chip scale packages, there is a need for technological innovation in the electrical contacting methods for probing, testing, and burn-in of these new packages. This paper presents a novel silicon contact technology as a contactor for testing the various flip chip and chip scale packages (CSPs). The basic silicon contact technology consists of square micromachined pockets that are etched into a silicon substrate. The pockets are dimensioned and arrayed to mirror the solder bump arrangement of the package. The bumps are, therefore, nestled in these electrically conductive pockets for testing and burn-in. Electrical connections are made through metal interconnects to the periphery. The pockets can be constructed in different ways to meet the tolerances and the other mechanical, material, and electrical requirements of the package bumps. As the size and pitch of the bumps decrease, the pockets can be scaled to smaller sizes to accommodate the new dimensions. This new contact technology has numerous scalable advantages over other standard contact technologies.