Noise analysis and optimization of CMOS CCII+ based ECG systems

Noise analysis and optimization of an integrated Electrocardiogram signal acquisition and bootstrapping system, based on a second generation current conveyor circuits is analytically presented. Advanced noise simulations are provided, giving insights into each MOSFET device noise contribution to the overall circuit noise. Noise optimization criteria are extracted, in relation to thermal and flicker noise sources, the dominant MOSFET devices noise contributors' sizing, and the application specifications. Analysis is supported by simulation results in standard 2P/3M 0.35 μm CMOS process, commercially available by Austria Micro Systeme (AMS).