Implementation of low power BCD adder using gate diffusion input cell

Now-a-days reducing the power consumption of the device is the most important factor in VLSI design. This paper deals with the low power, full voltage swing BCD addition using Gate Diffusion Input cell. The average power of proposed BCD adder is 10.2793 μWatt which is compared with the average power of conventional BCD adder and the average power of conventional BCD adder is 50.4721 μWatt. So the proposed circuit reduces the power consumption by 80%. Area and speed are optimized as well. A buffer is designed for getting the full voltage swing that is full logic levels of logic `1' and logic `0' in digital circuits. And the circuit designing and simulation was done with the UMC65 nm technology.