A sub-threshold operation of XOR based energy efficient full adder

As the size of MOS transistors are scaling down, energy dissipation has become a major consideration in nanometer CMOS circuits. In this paper, a Full-Adder is realized using XOR gate in sub-threshold region and the results shows that the device works perfectly without affecting its functionality keeping the power, delay and power-delay product at an optimum level. The analysis is done in Cadence Virtuoso Simulator in 180nm technology node with a supply voltage of 0.2V (volt).