A picosecond-resolution hybrid method of TDC implementation in FPGAs, based on differential time delays

Time-to-digital converters (TDCs) are useful and required building blocks in the field of fast measurement of small time intervals. When they are implemented through the use of time delays, there are three basic approaches for that, each with its benefits and downsides. However, trade-offs between speed, accuracy and precision are always present between them, which necessitates fine tuning of each created TDC for a specific purpose. This article proposes a new approach to a delay-based TDC implementation - a hybrid between the aforementioned basic approaches with an added external differential delay. This avoids some downsides of the hybrid constituents at the cost of prolonged and more complex system start-up sequence.