A soft error tolerant 12T hardened memory cell

In VLSI technology, while designing of memories fabricated in nano scale CMOS technology, radiation induced single event upsets (SEUs) pose a major challenge. SEU is also referred to as soft error which would result in a malfunction of electronic system without permanently damaging the device. Moreover, memories (e.g. SRAMs) are more sensitive to ionizing particles. Therefore, hardening of memory is the first priority in designs requiring SEU protection. In this paper, a completely unique low-power and extremely reliable radiation hardened memory cell (RHM-12T) using twelve transistors is planned to supply enough immunity against single event upset in TSMC 65 nm CMOS technology. The obtained results show that the proposed cell cannot tolerate not only from single node but also from multi node. Moreover, the proposed cell has comparable or lower overheads interms of static power, area and time interval that is when compared with previous radiation hardened memory cells.