Routing-path tracking and updating mechanism in reconfigurable Network-on-Chips

As the rapid advancement in semiconductor technology leads to shrinking of transistor sizes and the integration scale is over one billion transistors, Reconfigurable Network-on-Chips becomes a new methodology providing adaptive infrastructure resources as well as flexible network protocols to adapt to dynamic environment. In this paper, we propose a routing-path tracking and updating mechanism for reconfigurable Network-on-Chips. The hardware architectures used to implement the proposed mechanism such as modified RNoC routers and Network Interfaces are introduced. With this routing-path tracking and updating mechanism, packet transmission delay can be reduced from 4.92% to 33.33% depending on the data structures.