VCO-based integrator PLL [Technical Program]

Charge pump based PLLs are widely used in modern ICs because of their superior performance. The capacitor in the loop filter is usually large which is implemented either as an off-chip discrete component, or on-chip consuming significant silicon area. Both implementations increase the cost. Moreover, the voltage ripples at the loop filter can result in large spurs at the VCO output. To address these two issues, a new architecture is presented in this manuscript. Instead of using a charge pump and capacitor as the integrator, the phase signal of a VCO is used to implement the integrator. To ensure loop stability, a voltage controlled delay line is developed to introduce a zero in the loop transfer function. A phase domain model is developed to analyze the performance of this novel architecture. Functional simulation in Spectre verifies the proposed design. Analysis has shown the proposed architecture saves silicon area with a small increase of power consumption.