A versatile ATM switch concept

This contribution deals with a concept for the realization of network nodes in an ATM network. The concept is based on a module called 'M/I -stage', which is derivedfinom the concept of an output buffered switching matrm The M/I -stage is equipped with crosspoint buffers and one output buffer. Taking into account the wiring area of the multiplexed data stream and the area spent for the crosspoint buffers a solution has been developed which minimizes the total chip area of the 'M/I-stage'. Design and implementation of an 8/1-stage as a single IC has been started. Based on this component the architecture of a prototype network node is described.