Design of MMIC LNA for 1.9 GHz CDMA portable communication

This work describes an on-chip matching MMIC LNA which was optimized for noise figure by careful selection of FET size, bias, and thorough consideration of its gamma opt and Rn characteristics. A new in-house developed inductor model and real-world extracted EEFET3 model are employed in order to assure accurate simulation. A source peaking technique is used to lower input return loss. The developed on-chip matching LNA shows strong robustness that makes it easy to fabricate with the existing 0.5 /spl mu/m GaAs MESFET process. Its low current consumption (3.2 mA) and high linearity (P/sub in 1 dB/=-8 dBm, I IP3=7.6 dBm, ACPR=-70 dBc) also make it suitable for CDMA portable wireless communication.