Design of repetitive very high voltage pulse forming networks of short duration

Design of very high voltage pulse forming networks for short pulse (< 1 /spl mu/s) lengths often leads to a serious conflict between minimizing circuit inductance, component size, impedance, and insulation requirements. However, with the selection of the correct network configuration, one can minimize these conflicting parameters. Design of PFN's with unique shape and impedance characteristics has been investigated for over 50 years. Procedures are well established but represent only the ideal case for the circuit elements. Including the stray capacitances, inductances, and component equivalent circuits in the analysis, one often finds that the circuit designed on paper is not realized in practice. This often leads to "fine tuning" the circuit and modifications that can cost time and money. These problems are not experienced with networks of large impedances but increase as the impedance of the network decreases. This paper describes a computer aided procedure that allows the engineer to consider the effects of stray elements in the design of very high voltage (>1 MV) networks for low impedances, thus, minimizing any surprises when the circuit is constructed.