Performing scheduling and storage optimization simultaneously using genetic algorithms

This paper presents a method for performing scheduling and allocation of functional units simultaneously with storage optimization in high-level synthesis using genetic algorithms. The method involves augmenting a standard CDFG with storage operations and scheduling these operations on available storage units. The resulting synthesis tool is flexible and can support any type of storage unit from registers, to multi-port register files and memories. Results on typical circuits and benchmarks prove the flexibility and performance of this technique.