Triangular neighborhood function for self-organizing neural networks implemented in the CMOS 130nm technology

The paper presents a novel transistor level implementation of a triangular neighborhood function (TNF) suitable for self-organizing maps (SOMs) realized as Application-Specific Integrated Circuit (ASIC). Our previous investigations have shown that using the TNF instead of more complex Gaussian neighborhood function (GNF) is sufficient to achieve good learning properties. It can be said that the TNF is a very good approximation of the GNF, while its hardware implementation requires only a single multiplication operation followed by shifting the bits to the right. The second operation is the substitute of a division operation by a number that is one of the powers of 2. In the proposed solution the multiplication is realized in an asynchronous parallel binary tree, without the use of any clock generator. As a result, this operation is very fast. The prototype circuit have been realized in the CMOS 130 nm technology and verified by means of the postlatout simulations. For the resolution of the input signals of 4 bits (sufficient even for relatively large maps), the overall calculation time equals about 5 ns. An average energy consumption for a single calculation cycle equals 2 pJ. The chip area equals about 0.01 mm².