FPGA based highly efficient, fast & reliable controlled braking method based on 13 level medium voltage drive suitable for high inertia

Any variable frequency drive requires an efficient and controlled braking system. Therefore, different braking techniques have been the subject area of researchers to enhance the performance as well as overall life of the drives. In this paper, a literature study is made of various existing braking methods, focused on induction motor (IM) drive performance. The braking methods are compared and summarized based on speed range, braking time and efficiency of 13 level medium voltage 3-phase squirrel cage IM drive. Finally, an advanced D.C. braking technique is presented where braking torque in terms of varying D.C. signal is injected into the stator windings using fully controlled phase shifted carrier sine pulse Width Modulation (PSC-SPWM). A method has been proposed for providing frequent smooth, fast and fully controlled braking torque with minimal regeneration from VFD, without additional hardware circuit. Simulations are performed in MATLAB/Simulink, tested and validated on Digital signal processor (DSP) and Field-Programmable Gate Array (FPGA) based drive. Control algorithm written in DSP and FPGA, is used to generate PWM signals because it is fast, having simple hardware and software design. Test results are presented in this paper.