Operational Compatibility Of CMOS Circuits in Electromechanical Telephone System Noise Environments

A problem exists in selecting an appropriate logic family and generating application rules to be used in the design of an electronic sub-system which will operate reliably in noisy electromagnetic environments. A typical subsystem must store, control and sense the status of high voltage relays. It must meet two conflicting requirements: 1) high speed access by a CPU 2) immunity to relay noise We evaluated the relative merits of the HTL, TTL,'PMOS and CMOS technologies for an application with such requirements. HTL and PMOS were rejected primarily because of the insufficient number of available functions, second sourced by different vendors and high power requirements. The TTL family provided both a large number of functions, which simplified logic design, and the high switching speed required by the CPU interface. Because its noise immunity imposed severe wiring restrictions and its high power dissipation penalized the system packaging, TTL proved uneconomical. CMOS provided the best combination of properties. Its low power dissipation and the high number of available second sourced functions permitted high packaging density. Its switching speed was adequate to meet the CPU interface requirements, while its noise immunity was sufficient to withstand relay noise.. However, CMOS has two disadvantages which must be considered: 1) Non-uniform output impedance which causes a) noise immunity variation amongst function types b) some wiring restrictions due to crosstalk c) variation in current drive between function types 2) Switching speed degradation which results from a) output capacitive load (due to both gate input and wiring capacitance) b) input transition time c) power supply voltage variations CMOS will provide reliable and economical system operation in severe electromagnetic noise environments if all its properties are identified and considered during logic implementation and circuit design.