Design and development of flexible reconfigurable SPI interface between baseband and RF subsystems for wireless radio prototyping

Prototyping of wireless radio is very important to demonstrate the features of any wireless radio before deployment. The core implementation stages of wireless radio prototype include physical layer digital baseband (DBB) processing, RF transceiver chip configuration and interfacing of baseband and RF. Flexibility and adaptivity are very much required in MIMO-OFDM based realtime prototypes, which is considered a key technology in all modern wireless-access communication systems. Realizing flexible digital interface between DBB and RF transceiver in such prototypes is one of the important challenge. Furthermore, to overcome the disadvantage of non-programmability of discrete Commercial-Off-The-Shelf (COTS) RF components and also to reduce the time to prototype an efficient and flexible interfacing of Integrated RF module is required. These RF ICs are interfaced to digital baseband processor through Serial Peripheral Interface (SPI). This paper aims at design and development of a flexible reconfigurable SPI interface to configure the wide-band RF transceiver. The SPI IP core is implemented in VHDL and ported on Altera Cyclone-V FPGA to meet the timing and to do realtime control of RF transceiver.