A new multilevel inverter topology with reduced device count and blocking voltage

In this paper, a novel twenty-one level inverter unit is proposed. Using this, the cascaded multilevel inverter topology is suggested to achieve the higher number of output levels. The cascaded topology is constructed by the series connection of the twenty-one level basic unit. The topology is created in such a way that more levels can be added without modifying the existing circuit. The proposed topology offers advantages like reduced device count, reduced blocking voltage, and better dc source utilization compared to the conventional topologies. Various algorithms, to decide the rating of dc voltage sources, are suggested with its comparison. The computer aided simulation confirms the effectiveness of the introduced topology and algorithms.