Impact of Via Density on the Mechanical Integrity of Advanced Back-End-of-Line During Packaging

The influence of via density on the mechanical integrity of Back-End-Of-Line (BEOL) interconnects under Chip Package Interaction (CPI) loading is evaluated using a dedicated package test chip with 4 metal layers, and different via densities interconnecting the first 3 metal layers where the bottom two metal layers employ advanced low-k materials with k = 2.4 and have a low-k/metal ratio density of 50%. The assessment is done with pre and post packaging comparison of two dedicated CPI test structures. The test structures consist of BEOL daisy chains that allow to monitor resistance changes after packaging. The data indicate a correlation between the BEOL via density and packaging failure percentage, where a lower via density in any metal layer induces more failures. Additionally, data obtained from the crack propagation sensor are used to estimate to probability of the crack propagating in the single layer versus the probability of the crack propagating through multiple layers, and its dependence on via density. It is shown that configurations with lower via density, corresponding to approximately 1% for this test vehicle, lead to cracks propagating in multiple layers of the BEOL stack.