A Highly Integrated RFSoC Design for 3G Smart Phone Application

The demand on highly-integrated, low-cost radios solution dictates the development of RFSoC targeting the 3G market. By integrating connectivity radios, such as WiFi, Bluetooth, GPS, and FM, the world's 1st 3G RFSoC solution was presented in this pager using TSMC 28nm CMOS process with low-cost single-layer wire-bond CSP package. With fully consideration on interference and co-existence, excellent RF signal integrity performance is achieved to provide a cost-effective solution for 3G mobile phone applications. In this paper, a comprehensive co-design methodology was developed to integrate the aggressor, victim, and coupling path model into a single platform, and from which the coupled interference voltage on the victim node can be evaluated systematically. Based on the proposed chip-package-PCB co-design flow, we can deal with the desensitization problem in RF receivers under the interference of high-speed memory interface and 4-core CPU operation. In order to realize the LPDDR2/3-1066Mbps operation with 4L HDI-1 PCB, a novel pad/pin placement was also proposed to compromise the SI/PI and RF de-sensitization performance. Frequency hopping technique is introduced to minimize system interference. Besides, RF link budge analysis is also necessary for the co-existence problem between cellular and connectivity radios. Furthermore, system IR drop is properly controlled to achieve 1.3GHz speed on 4 cores CPU. The proposed co-design methodology had been applied to the design iteration of presented RFSoC and it can be observed that the desensitization issue was completely resolved by on/off-chip co-design solutions. This provides a persuasive verification for the proposed methodology and also shows that system performance can only be optimized with a thorough chip-package-PCB co-design. This generalized methodology can widely be applied to all kinds of system-on-chip (SoC) / system-in-package (SiP) designs for cellular and connectivity applications, in which interference and couplings are bottlenecks of system integration.