Reliable 300 mm Wafer Level Hybrid Bonding for 3D Stacked CMOS Image Sensors

3D Stacked Image sensor is the stacking of a Back-Side Illuminated (BSI) CMOS Image Sensor on a logic die. It enables compact size, higher performances and additional functionalities compared to standard BSI sensors. The highest footprint reduction is obtained with 3D hybrid bonding with metal interconnects between top and bottom tiers. Hybrid bonding process with oxide / copper direct bonding allows the highest scalability of interconnect pitch. In this study we present the morphological and electrical characterizations of a test vehicle. The hybrid bonding of wafers from two different technology nodes is performed using a dual damascene integration for the hybrid bonding level. The main parameters to assess the bonding interface quality are analyzed such as the influence of the pad design, the impact of reworkability and wafer -- to-wafer overlays. The process robustness is studied through reliability tests and electromigration measurements.