Development of fundamental manufacturing processes for minimal fab

In this work, we propose a novel semiconductor manufacturing system using half inch wafer for customizing designs of semiconductor devices. Due to its distinct features of cleanroom-free and simplicity, a huge wafer transfer mechanism and complicated functions to uniform a large wafer process are eliminated. We have proved that without a cleanroom, using our clean-localized system of “minimal fab”, the manufacturing process is performed at a clean level equivalent to class 4 of ISO system. To clarify the system performance, we develop five device process bases; two using full minimal fab for fabricating PMOS transistor, CMOS inverter, three using hybrid process to utilize minimal fab and mega-fab for fabricating NMOS transistor, CMOS inverter and MEMS cantilever. Since an ion-implantation and a CVD machine of minimal fab are under development, we introduce simple impurity doping process by SOD coating following by thermal diffusion and sputtering system to form Al-Si gate for full minimal process while we make hybrid process possible with traditional fab to develop more various device fabrication.