Filter-based dual-voltage architecture for low-power long-word TCAM design

Ternary Content Addressable Memory (TCAM) provides superior table-lookup performance to the conventional search algorithms. However, as word length increases, large-sized TCAM suffers from high power consumption and throughput degradation. This paper presents filter-based dual voltage architecture for long-word TCAM. Without sacrificing throughput and noise immunity, the proposed filter-based dual voltage architecture can reduce lots of dynamic and static power consumption. Simulation results show that the proposed technique can achieve 87% of dynamic power and 63% static power reduction in 40nm CMOS technology when compared with traditional TCAM architectures. This proposed architecture is well suitable for applications that need long-word TCAM.