CMOS based design and simulation of ternary full adder and Ternary coded Decimal (TCD) adder circuit

A number system with radix-3 is referred to as Ternary system. With a lot of new ternary circuits being proposed as an alternative to the digital logic, we take a step further, in this paper we propose to design a Ternary coded Decimal (TCD) adder circuit based on CMOS technology. Unlike a Ternary adder, the TCD adder uses 3-bit Ternary coded Decimal (TCD) number as input and the resulting sum will also be in TCD form. The design of this TCD adder is based on a new custom circuit for ternary adder which is optimized for less number of transistors. In the due course we will also highlight how non-conventional, custom designed circuits provide area advantage compared to the Ternary k-map based methods.