Multi-rate clock and data recovery circuit for short-reach optical links

This paper presents a multi-rate clock and data recovery circuit with integrated adaptive equalizer. It was designed in a standard 0.18 μm CMOS technology with a single supply voltage of 1.8V and consumes 140mW. The prototype has been tested for short reach applications targeting a multi-rate 2³¹ - 1 NRZ pseudo-random binary sequence through a 50-m step-index plastic optical fiber (SI-POF), ranging from 400Mbit/s up to 2.5Gbit/s.