A multipath network-on-chip topology

Network-on-Chip (NoC) is a new on chip communication design system that replaced bus-based communication in System-on-Chip (SoC). It provides efficient and scalable communication among the IPs (Intellectual Properties) in a single chip. Mainly, it was introduced to fulfill the growing demand of electronics system which needs to integrate a large number of computational resources into a single chip with an aim to get high performances, And to get efficient performance, the interconnection network plays an important role in chip design. The network architecture or topology should be highly scalable so that it can incorporate a large number of IPs without degrading the performance. In this paper, we proposed a network topology that provides multiple path diversity and high degree of scalability. The architecture of the proposed topology is described along with a packet based adaptive routing algorithm. We simulated the network using an open source simulator named OMNeT++. The topology is tested for average latency, number of events that to be carried in the simulation using a packet based routing algorithm and has been compared with existing Fat tree topology.