Modelling a FPGA-based LLC converter for real-time hardware-in-the-loop (HIL) simulation

This paper proposes a FPGA-based LLC resonant converter model, which is applied to a real-time HIL simulation system. HIL simulation and LLC topology are both quiet popular in recent years and draw more and more attentions from engineers all around the world. But applying the HIL simulation technology to LLC topology is difficult due to the limitation of CPU speed. FPGA-based model is a suitable solution for this situation. A popular LLC model with H-bridge input and diode rectifier output is established and analyzed. The resonant LLC topology has three stages, including input stage, resonant tank and output stage. Each stage contains three parts, input signals, control signals and output signals. The relationship between three parts of each stage is fully investigated and modelled. A FPGA-based HIL simulation experiment is conducted and a normal PSIM simulation is also conducted to verify the FPGA-based model.