SIPI co-extraction and SPICE co-simulation for package on-die decap optimization

SIPI co-simulation is common practice for simultaneous switching noise (SSN) analysis at system level including PCB, package and die. However, SPICE models of the signal nets and the power delivery network (PDN) are usually separately extracted. A SIPI co-extraction methodology is proposed and applied to a DDR3 memory interface. A simplified SPICE model is introduced by scaling the signal nets toggling activities and efficient on-die optimization for on-chip and package co-design workflow is enabled.