Design and implementation of a low-cost SoC-based software GNSS receiver

A global navigation satellite system (GNSS) receiver processes signals transmitted from the satellites to determine user position, velocity, and time. Compared to conventional receivers, a software GNSS receiver offers better design flexibility and requires fewer dedicated hardware components [1]. An ideal software receiver typically processes all signals in a processor; however, this method is not efficient practically, because it becomes a computational burden for the processor. For this reason, frequent multiplications and operations are offloaded to hardware elements such as a field-programmable gate array (FPGA).