A Simulation Study of Forward Error Correction for Lost Packet Recovery in B-Isdn/atm

We present the results of a simulation study for a virtual circuit connection over an ATM network where forward error correction is performed at both the ATM cell level and the packet data unit (PDU) level. A main conclusion of this study is that at low loads ATM cells from the same source dominate in the switch buffers, while at high loads there is a mixing of ATM cells from different sources. For the latter case, ATM cell level coding performs better, while for the former, PDU level coding performs better. The combination of the two techniques has the best overall performance.