High speed content addressable memory with reduced size and less power consumption

Content Addressable Memory is a data storage device that is widely used in many applications. It is especially used in areas needing fast memory access. However, due to use of parallel based search approach and frequent charge and discharge of Match lines and Bit lines/ search lines; the power consumption of CAM is considerable. This paper presents a new cell design for reduction in power consumption of Ternary Content Addressable Memory over the chip. TCAM design techniques at the architectural level are reviewed and an optimized solution is provided. The size of CAM cell is further reduced with better speed and less power consumption as compared to previously implemented designs. A novel ternary content addressable memory (TCAM) cell is proposed that can be used both as Binary CAM and Ternary CAM. The proposed design can be utilized as per needs and requirements of the designers.