Design and implementation of 1 GHz Current Starved Voltage Controlled Oscillator (VCO) for PLL using 90nm CMOS technology

In wireless communication system the phase locked loop plays important role, specially Voltage Controlled Oscillator. It is an electronic device which is used for the purpose of generating a signal. Applications range is very vast, which includes clock generation in various microprocessors to carrier synthesis in cellular telephones, requiring a large range of different oscillators/signal generation topologies and the performance parameters differs as the need changes. VCO can be designed and built using many circuit techniques. This paper presents one of the ways to design and implementation of CMOS voltage controlled oscillators (VCO) for pll. A VCO is an oscillator circuit, where the control voltage controls the oscillator output frequency. In this paper CSVCO is has been designed Cadence Design Suite using GPDK 90nm CMOS Technology with supply voltage 1.8v. Intern Virtuoso Analog Design Environment tool of Cadence have used to design and simulate schematic. Simulation results are calculated for all process corners, temperature (−40°C to +100°c).