The improvement of the 2nd dummy poly gate removal with the optimized WAC condition

Gate last approach has started to appear in the high performance applications since 45nm technology node. Such approach has to leverage soft wet and asher process for the polymer and byproduct removal after the 2nd DPGR for the 1st DPGR metal damage concern. However, it's well known that it's hard for soft wet process to remove all byproduct. Even worse, the rich polymer inside trench could result in threshold voltage degradation. This work aims to come up with one overall solution to overcoming wet and asher process issue with SiO2 coating before etching. The results show the byproduct can be removed totally and the defect performance is greatly improved.