Fatigue crack growth modeling in the metallization of power semiconductors under cyclic thermo-mechanical loading

Power semiconductors may be subjected to short electric overload pulses during operation, which induce very high temperatures and temperature gradients in the multilayer chip structure. This can lead to material degradation in the ductile metallization and repetitive overload conditions can result in overheating and destruction of the device. A unified approach is presented predicting material degradation in terms of fatigue crack nucleation and fatigue crack propagation, to identify a tolerable number of electric overload pules during operation. Fatigue Indicators based on mechanical quantities are utilized to identify locations of material failure in the power metallization and material degradation is modeled. Repetitive loading leads to an evolving damage zone. The proposed approach is implemented within the framework of the Finite Element Method and exemplified at a simplified, generic metallization stack.