Design techniques for single-chip integration of high resolution analog conversion with a microcontroller, RAM, and flash EEPROM

This paper describes the design techniques used in a single chip implementation of an IEEE1451 standard transducer interface chip. The chip integrates an 8-channel 12-bit A-to-D Converter, two 12-bit D-to-A Converters, and an 8052 8-bit microcontroller with 256 Bytes SRAM and 10.5 KBytes Flash EEPROM on a 0.6 /spl mu/m CMOS chip. Key elements of the design flow were the integration of analog mixed-signal and digital ASIC design techniques with an 8052 assembly language simulation environment, and a code monitor for high-level debug.