Hardware and software performance of image processing applications on reconfigurable systems

Field Programmable Gate Arrays (FPGAs) have been extensively used in accelerating applications in many digital domains, examples include image and signal processing. These applications have been abundantly tested in high level languages like C, C++ and Matlab programming. Many standard libraries exist for image processing applications like OpenCV for end to end solutions. Applications centered around these libraries when implemented on embedded platforms like ARM or Power PC consumes considerable amount of processing time. In the last decade, these applications have been heavily tested on FPGAs as hardware (HW) for higher performance gain. Many optimizations and architectures have been proposed in this area examples are parallelism extraction, operation scheduling, pipelining, loop unrolling etc.. In this paper, we present a combination of optimizations and architecture for image processing applications on FPGAs. For software (SW), LLVM compiler has been used for applying optimizations and finding SW execution time on the Ubuntu machine. For HW generation and optimization, Vivado-HLS has been used and tested with four filters on Virtex-5 ML507 kit. The result shows the performance comparison of four C programs as software/hardware with respect to time and resource consumption.