MOS memory with ultrathin Al2O3-TiO2 nanolaminates tunnel oxide and 2.85-nm Si-nanoparticles charge trapping layer

In this work, a MOS memory with 4.56-nm ultrathin Al
₂
O
₃
-TiO
₂
nanolaminates thin film deposited by Atomic Layer Deposition (ALD) followed by 1-nm HfO
₂
tunnel oxide deposited by Plasma-Assisted ALD is studied. The charge trapping layer consists of 2.85-nm Si-nanoparticles (Si-NPs). A memory effect is observed using high frequency C-V measurements. The shift of the threshold voltage (Vt) obtained from the hysteresis measurements at 10/-10 V program/erase voltage is around 5 V and a 3 V Vt shift is obtained at low operating voltage of 6/-6 V. In addition, the calculated retention characteristic of the charges in the Si-NPs memory (>10 years) makes such memory structure promising for applications in non-volatile memory devices.