Design of a 2.4GHz power amplifier

This paper presents the design of a 2.4GHz power amplifier (PA) with high efficiency and the PA is implemented in 0.18μm RF CMOS process. Differential structure is used to reduce the effect of source inductance on the circuit. Output matching network is designed to reduce the chip area. Test results show that with the supply voltage 1V, the maximum output power is about 8dBm, and the maximum PAE is 19%. When the input power is -10dBm, S₁₁ is lower than -23dB, and S₂₂ is lower than -9dB.