Effect Of Post Plasma Treatment On Reliability Of ECRCVD SioF Films

As the dimensions of ULSI devices continue to shrink, the RC delay of long interconnections will limit the device high speed performance. In advance logic devices, the stack of the interlayer dielectrics has increased to five or six layers. One of the most effective ways to reduce the parasitic capacitance is using low dielectric constant materials for the interlayer dielectrics. Resent works have indicated that the incorporation of fluorine atoms in the plasma deposited silicon oxide can reduce the effective dielectric constant below 3.5.