SysAlloc: A hardware manager for dynamic memory allocation in heterogeneous systems

System-on-chip designs are increasingly complex and dynamic, with many IP cores, CPUs and off-chip Memories interconnected via shared buses. Static allocation of RAM resources requires designers to analyse the memory needs of each component, which can lead to poor memory efficiency, and is infeasible in a dynamically changing system. Dynamic memory allocation is one solution to this problem, but is usually only supported in software. We propose SysAlloc, a hardware-based dynamic memory allocation scheme for heterogeneous systems, which allows software and hardware to access a shared memory allocator, and allows dynamic memory allocation in the absence of software. Our allocation protocol is accessible to any client which can perform memory reads and writes over a shared bus, including software, RTL, and HLS clients, and can scale at run-time to any number of active clients. In contrast to existing designs, the proposed allocator can manage DDR-scale memories while having constant FPGA resource utilisation. We evaluate SysAlloc's protocol and memory manager in a Zynq system with both software and hardware clients, demonstrating scaling to 15 concurrent clients, and a peak system allocation rate of 1.36 million allocations/second when managing 128MB of DDR for 4 clients.