A new approach for implementing HV (10 kV's) fast closure (ns) semiconductor switches

This paper describes a new approach for fabricating and operating semiconductor switches with blocking voltages of tens of kV and closing transition times of nanoseconds to conduct current rates of rise on the order of 1000 A/ns. This approach has been modeled with commercial semiconductor codes to show the feasibility of the concept. The new switching approach is applicable to all switches that employ reverse biased PN junctions to block current flow. The initial modeling was conducted with Silicon Carbide (SiC) materials, but the approach is viable in GaN and other semiconductors. The proposed approach, the design, the calibration of the computer models, and the resulting switch waveforms are presented. In addition, a high voltage, low inductance package with integrated electrode cooling structure has been designed.